buffer module

英 [ˈbʌfə(r) ˈmɒdjuːl] 美 [ˈbʌfər ˈmɑːdʒuːl]

缓冲(组)件

计算机



双语例句

  1. Design and implement of the buffer generation module in GIS platform software development
    GIS平台软件开发中缓冲区生成模块的设计与实现
  2. After integrating the buffer manager and other module in the chip, it can play VCD and DVD fluently based on the FPGA validate platform.
    该芯片的其它模块与本文设计的单元整合之后,在FPGA验证平台上实现了播放VCD影碟和DVD影碟的功能。
  3. Double Data Buffer Memory& A CAMAC Module
    CAMAC双数据缓冲存储器
  4. The Institution of Intellectual Buffer in the Input Module of Financial Softwares
    财会软件开发中智能缓冲区的设立
  5. The overall design of transmission error measuring system is presented, including pre-shaping and amplifying circuit, error sampling module, FIFO data buffer, USB 2.0 transmission module and PC.
    给出了传动误差测量系统的整体设计,包括前置整形放大电路、误差采集模块及FIFO数据缓冲器、USB2.0传输模块、PC机等。
  6. Presented the principle of large screen field emission display integrated system based on FPGA control technology which includes the video sampling module, buffer module, clock control module, integrated gray-modulation control module and the integrated row control module.
    论述基于FPGA的FED视频驱动显示控制系统的工作原理,包括了视频采集控制模块、缓存模块、时钟控制模块、集成灰度调制控制模块以及行集成控制模块等的FPGA控制技术。
  7. There're three key modules in the system, which are motion estimation module, motion compensation module and buffer module.
    该系统包括三个关键模块:运动估计模块、运动补偿模块和缓存器模块。
  8. In the DTV transport stream monitor and analysis project, I am in charge of transport stream decoding module, T-STD software simulation and buffer monitor module and USB 2.0 recorder and generator.
    在数字电视传输流监测分析项目中,本人主要负责传输流解码回放功能模块、传输流系统目标解码器的软件模拟和缓冲器监测功能模块以及硬件部分USB2.0数字电视传输流记录发生器的研究和开发。
  9. In this architecture, four function modules, namely Rate Control Module, Error Control Module, Video Quality Adaptation Module and Buffer Control Module, comprise the whole server.
    在这个实现框架中直播服务器由四个功能模块组成:速率控制模块、差错控制模块、质量自适应模块以及缓冲区控制模块。
  10. The corresponding driver module and buffer module are appended in the route of data flow to avoid data conflict and ensure data integrality.
    在数据流的路径上添加了相应的驱动和缓冲模块,避免了冲突,保证了数据的完整性。
  11. Database manager is applied to perform a uniform management on the database access operations and mask the complex database operations for the business logic components. Likewise, the performance of database access is improved by means of the buffer pool and operation estimation module.
    数据库管理器对数据库访问操作进行统一管理,为业务逻辑组件屏蔽了复杂的数据库操作,同时缓冲池管理和操作评价模块也提高了对数据库的访问性能。
  12. When data was sent by system, the data was stored in send buffer at first; and then it was sent through communication module.
    系统发送数据时,将数据存入发送缓冲区,由通信模块将数据发送出;
  13. The network packets are delivered into separated buffer queues to be detected by the traffic statistics module.
    流量统计模块将接收到的网络数据包分别放到不同的缓冲队列中等待检测处理。
  14. By using the send message buffer pool, processing capability and loading capability of the message processing module is improved, and capability of the whole system is improved.
    通过应用发送消息缓冲池,提高了短消息处理模块的处理能力和负载能力,并从整体上提高了系统的性能。
  15. The Buffer of On-board Test Circuit Module in High g Shock
    高g值冲击下存储测试电路模块缓冲保护研究
  16. When the data was received, the data was stored in receive buffer at first, then the data was marked and managed by the upper module.
    接收数据时,将其存入接收缓冲区,并标识数据供上层模块处理。
  17. In the Internet, the buffer management technology based on packet dropping is an important module of packet forwarding devices, and the related algorithm has great influence on the performance of the networks.
    Internet中,基于分组丢弃的缓存管理技术是分组转发设备的重要功能模块,其算法对网络性能会产生重大影响。
  18. SDRAM for digital image storage principle, to complete the design of the image storage module; 4 、 Nios ⅱ CPU call the data in the SDRAM into the FIFO buffer, the data is read out and display output through VGA port using the timing control module.
    结合SDRAM对数字图像的存储原理,完成图像存储模块的设计;4、通过NiosⅡCPU的调用将SDRAM中的数据读到FIFO缓冲中,经过时序控制模块再将数据读出并通过VGA接口显示输出。
  19. The MAC layer controller hardware modules are designed using Verilog hardware description language, including the transmission of the engines, receiving engines, buffer module, register module, control module and the WEP module.
    采用Verilog硬件描述语言实现了MAC层控制器的硬件部分,包括发送引擎、接收引擎、缓冲区模块、寄存器模块、控制模块等模块。
  20. The hardware platform includes the audio codec modules, FPGA-based logic control and data buffer module, ARM-based embedded system modules and DSP-based co-processor module.
    系统硬件平台主要包括基于CODEC的音频编解码模块、基于FPGA的逻辑控制与数据缓冲模块、基于ARM的嵌入式系统模块和基于DSP的协处理器模块。
  21. Data acquisition system design, including sampling circuit design, circuit design, as well as buffer control module design.
    数据采集系统的设计包括采样电路的设计、缓存电路的设计以及控制模块的设计。
  22. We use modularized method to divide the implementation layer into several modules, such as recording module, playing module, transmission module, buffer module, encoding module, decoding module 、 packing module, unpacking module.
    实现层采用模块化设计方法,分为录音模块、播放模块、编码模块、解码模块、传输模块、缓冲模块、打包模块、解包模块。
  23. There are three major functional modules in CMMB player: buffer module, audio decoder module, audio and video playback module.
    CMMB播放器主要有三大功能模块:缓冲模块、音频解码模块和音视频播放模块。
  24. This dissertation does logic implementation of the buffer module in physical coding sublayer. This module resolves problem of data transfer between logical layer and physical layer, and carries out the function of receiver-controlled flow control which protocol requires. 4.
    设计了物理编码子层中的缓存模块,该模块解决了物理层和逻辑层之间的数据传输问题,并且实现了协议所必须的接收端流量控制功能。
  25. Video capture module, MCU interface module and the double buffer arbitration module in this system achieve the desired and satisfactory results.
    视频采集模块,MCU接口模块与双缓冲区仲裁模块在此系统上均已实现并达到预期效果,结果令人满意。
  26. The player consists of four modules, which include network module, buffer module, audio-video decoding and playing module. Each part of the player is respectively responsible for accepting media data from the network, audio/ video decoding and playback.
    播放器由四大模块组成:网络模块、缓冲模块和音视频解码播放模块。
  27. Buffer module stores audio-video packets which received and processed by the network module to the circular buffering queue to solve the problem which caused by packets loss, jitter and packets reordering.
    缓冲模块把从网络模块接收到的音视频数据包进行处理,然后将处理后的数据存储在循环队列中,以此来缓解网络丢包、抖动和乱序引起的问题。
  28. Provide the kernel to user space memory mapping and buffer management functions to use the kernel buffer efficiently Application program interface module: Set the filter rules.
    同时提建内核到用户空间的内存映射与缓冲区的管理功能,实现内核缓冲区的高效率使用。应用程序接口模块:提供过滤规则的设置,网络数据包的读取及其他相关设置功能。
  29. It uses command queue as the buffer of the commands that the upper function module layer send to control the device, the command parser parses the commands taken from the queue and transfers the commands to the command dispatcher, there the lower driver will be called.
    以指令队列作为上层功能软件与驱动程序之间的设备操作指令缓冲器,指令解析器对指令队列的指令进行解析并交由指令调度器调度。
  30. Micro Control Unit reads the configuration data from buffer of GPRS module and then saves it to the configuration memory.
    单片机读取GPRS模块缓存内数据转存至配置数据存储器。